Clock Divide

Counts incoming clock pulses and outputs every Nth pulse, with a reset input for restarting the count.

What it does #

Clock Divide turns a fast clock into a slower event stream. Each incoming clock edge advances an internal counter; the selected pulse in every cycle is forwarded to the output. Reset returns or arms the counter for the beginning of a new division cycle.

Controls and ports #

Control	Label	Official description
clock_interval	Clock Interval	Cycle length before sending another trigger signal out

Practical uses #

• Create rhythmic subdivisions from a master Grid clock.
• Build repeating patterns whose cycle length is set by the clock interval.
• Reset several divided clocks together so their rhythmic phases line up.

Things to know #

• The interval is a pulse count, not a tempo or time value.
• The module is edge-driven and stateful, so its result depends on previous clock and reset events.
• Reset timing matters when reset and clock arrive on the same sample.
• Recovered Nitro code uses a 0.5 comparison while shaping the selected clock-high portion, but the complete input-trigger policy still requires measurement.

Technical details #

A high-confidence Nitro implementation candidate supports the technical summary, but the visible-module mapping remains inferred.

The confirmed grid/logic/clock_divide.nitrobin implementation stores a step counter, the current step-trigger state, a reset flag, and an output latch. A clock event advances the counter and wraps it when it reaches steps; the output latch is enabled for step zero and follows the incoming high segment using a v > 0.5 test. Reset sets a flag consumed by the step update. This establishes a stateful count-and-gate design, while decompiler gaps leave exact event ordering unresolved.

Nitro port	Type
stepIn	InputAudioPortType
resetIn	InputAudioPortType
steps	InputValuePortType
out	OutputAudioPortType
currentVal	OutputValuePortType

Open questions #

• Measure whether the first incoming pulse is output, the exact reset timing and simultaneous clock/reset priority, and the behavior at interval 1.

Version and sources #

Checked against Bitwig Studio 6.0.6. This page combines Bitwig's module metadata, the existing Grid course and guides, and Nitro analysis where the mapping is strong enough to support a technical statement.

Related material #

• Grid Modules course reference
• Bitwig Logic Modules - Practical Uses for Logic Operators in Modular Patching

Return to Bitwig Grid Modules or the Grid Modules course lesson.